DocumentCode
2140311
Title
QPF: efficient quadratic placement for FPGAs
Author
Xu, Yonghong ; Khalid, Mohammed A S
Author_Institution
Dept. of Electr. & Comput. Eng., Windsor Univ., Ont., Canada
fYear
2005
fDate
24-26 Aug. 2005
Firstpage
555
Lastpage
558
Abstract
In this paper we present QPF, a quadratic placement tool for FPGAs. Quadratic placement algorithms try to minimize total squared wire length by solving linear equations. The resulting placement tends to locate all cells near the center of the chip with a large amount of overlap. Also, since squared wire length is only an indirect measure of linear wire length, the resulting total wire length may not be minimized. We propose methods to alleviate the above two problems that give high quality results while minimizing the total run time. We incorporate multiple iterations of equation solving process together with a technique for pulling nodes out of the dense area while minimizing linear wire length. Experimental results using twenty MCNC benchmark circuits show that, on average, QPF is 5.8 times faster compared to a well known FPGA placement tool VPR, while providing almost comparable estimated total wire length.
Keywords
field programmable gate arrays; iterative methods; logic design; minimisation; quadratic programming; FPGA placement tool; MCNC benchmark circuits; iterative equation solving; linear equations; multiple iterations; quadratic placement tool; wire length; Circuits; Computational modeling; Equations; Field programmable gate arrays; Length measurement; Partitioning algorithms; Simulated annealing; Standards development; Very large scale integration; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2005. International Conference on
Print_ISBN
0-7803-9362-7
Type
conf
DOI
10.1109/FPL.2005.1515784
Filename
1515784
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