• DocumentCode
    2141009
  • Title

    Finite field division implementation

  • Author

    Deschamps, Jean-Pierre ; Sutler, G.

  • Author_Institution
    Univ. Rovira i Virgili, Tarragona, Spain
  • fYear
    2005
  • fDate
    24-26 Aug. 2005
  • Firstpage
    670
  • Lastpage
    674
  • Abstract
    A generalized version of the plus-minus algorithm is used for implementing dividers over GF(pn). Generic dividers have been synthesized in the general case of GF(pn) and in the particular cases of GF(2n) and GF(p). The theoretical costs are O(logN) being N the number of field elements, and the theoretical computation times are O(logN) in the case of dividers over GF(pn) and GF(2n), and O((logN)2) in the case of dividers over GF(p). Finally, the results of FPGA implementations are reported, and a comparison is made between dividers over GF(p), GF(2n) and GF(pn).
  • Keywords
    Galois fields; digital arithmetic; field programmable gate arrays; FPGA; finite field division; generic dividers; plus-minus algorithm; Authentication; Costs; Digital signatures; Elliptic curve cryptography; Field programmable gate arrays; Galois fields; Iterative algorithms; Polynomials; Public key; Public key cryptography;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2005. International Conference on
  • Print_ISBN
    0-7803-9362-7
  • Type

    conf

  • DOI
    10.1109/FPL.2005.1515810
  • Filename
    1515810
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2141009