Dopant-segregated source/drain technology for high-performance CMOS

Author

Kinoshita, Atsuhiro

Author_Institution

Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan

fYear

2008

fDate

20-23 Oct. 2008

Firstpage

150

Lastpage

152

Abstract

Schottky barrier MOSFETs (SBTs) have attracted much attention as a candidate for achieving high-performance in future ULSIs. Their potential advantages are low electrode resistance, short channel effect immunity and high carrier injection velocity, and many more. The major obstacle is however, to reduce the Schottky barrier height (Ã¿_b) in these devices (both n- and pMOSFETs) since large Ã¿_b severely limits the current drivability. One promising candidate to achieve the low Ã¿_b, is dopant-segregated Schottky (DSS) junctions. In this paper, we report process and characteristics of DSS junctions.

Keywords

MOSFET; Schottky barriers; Schottky gate field effect transistors; ULSI; semiconductor doping; Schottky barrier MOSFET; Schottky barrier height; ULSI; current drivability; dopant-segregated Schottky junctions; dopant-segregated source-drain technology; electrode resistance; high carrier injection velocity; high-performance CMOS; short channel effect immunity; CMOS technology; Decision support systems; Doping; Electrodes; Impurities; MOSFETs; Schottky barriers; Silicidation; Silicides; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-2185-5

Electronic_ISBN

978-1-4244-2186-2

Type

conf

DOI

10.1109/ICSICT.2008.4734493

Filename

4734493