Degradation of metal induced laterally crystallized n-type polysilicon TFTs under dynamic gate voltage stresses

Author

Wang, Huaisheng ; Wang, Mingxiang ; Wong, Man

Author_Institution

Dept. of Microelectron., Soochow Univ., Suzhou, China

fYear

2008

fDate

20-23 Oct. 2008

Firstpage

640

Lastpage

643

Abstract

Degradation behaviors of metal induced laterally crystallized n-type polysilicon TFTs under dynamic gate voltage stresses have been investigated. Device degradation occurs when the base voltage of gate pulses is lower than the flat-band voltage, and more degradation occurs with steeper falling edge and larger amplitude of the gate pulses. Device degradation is attributed to the hot carrier mechanism related to the transient voltage transition at the falling edge of the gate stress pulses.

Keywords

elemental semiconductors; hot carriers; semiconductor device testing; silicon; thin film transistors; transients; Si; device degradation; dynamic gate voltage stresses; flat-band voltage; gate stress pulses; hot carrier mechanism; metal induced laterally crystallized n-type polysilicon TFTs; transient voltage transition; Active matrix technology; Crystallization; Degradation; Driver circuits; Frequency; Hot carriers; Stress; Temperature; Thin film transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-2185-5

Electronic_ISBN

978-1-4244-2186-2

Type

conf

DOI

10.1109/ICSICT.2008.4734612

Filename

4734612