Precision ion implantation: A critical tool for advanced device processing

The scaling requirements of device technologies beyond 100 nm can only be satisfied by careful thermal process and defect engineering. We will demonstrate the need for precision ion implantation by focusing on three areas: (1) Junction Formation: Thermal processes trend to ultimately diffusion-less anneals such as laser or flash annealing. As a consequence, the final dopant distribution is more and more dominated by the as-implanted one, which makes implant angle precision imperative. Using TCAD simulations we analyze implant precision requirements for 32 nm half-pitch high-performance logic. A Pareto chart of process variables and their impact on transistor Idsat is developed. (2) Well Formation: Changing the implant angles during well formation to 0° results in improved STI isolation or alternatively in significant die-size reduction. Additionally, channeling implants produce less defects in the surface region leading to a reduction in leakage. Using TCAD simulations of a 80 nm DRAM technology we analyze both aspects quantitatively. (3) Elimination of Residual Damage After Diffusion-Less Anneal: We present results of two techniques designed to eliminate residual damage without the need for a post-anneal thermal process step. Both methods rely on supplementing and/or enhancing amorphization during implantation.