Intermodulation reduction concept for cascode RF amplifiers

This paper proposes the solution to improve intermodulation distortion in narrowband cascode amplifiers. Operation of the circuit is based on additional modulation of bias voltages in a cascode stage by the low frequency components of the drain current spectrum resulting from nonlinearity. CMOS cascode amplifier chip was designed in a low cost 0.8 μm to verify this concept. The circuit demonstrates typical 12 dB improvement in the IM product levels (6 dB increase in IIP3) compared to standard circuit (without compensation). The approach presented here may be used simultaneously with other classic techniques - like negative feedback - to further expand the dynamic range of cascode amplifiers.