DocumentCode
2152097
Title
Efficient implementation of the integer lifting transform for video compression on FPGA
Author
Debono, Carl J. ; Izzo, Keith
Author_Institution
Dept. of Commun. & Comput. Eng., Univ. of Malta, Msida, Malta
fYear
2013
fDate
25-27 Sept. 2013
Firstpage
71
Lastpage
74
Abstract
In this paper, we present a very efficient hardware configuration for the Integer Lifting Transform (ILT), implemented as part of an object-based video compression system on a Field Programmable Gate Array (FPGA). This configuration requires very low resources and memory, yet it is still capable of working in a real-time manner, and can handle large video frame resolutions. The compression quality achieved by the ILT ranges between 22dB and 36dB for high and low frame motion respectively, with whole frames having an approximate quality of 26dB.
Keywords
data compression; field programmable gate arrays; transforms; video coding; FPGA; ILT; compression quality; field programmable gate array; hardware configuration; integer lifting transform; object-based video compression system; video frame resolutions; Field programmable gate arrays; Hardware; Image coding; Multiresolution analysis; Video compression; Wavelet transforms; FPGA; Lifting scheme; Video object compression;
fLanguage
English
Publisher
ieee
Conference_Titel
ELMAR, 2013 55th International Symposium
Conference_Location
Zadar
ISSN
1334-2630
Print_ISBN
978-953-7044-14-5
Type
conf
Filename
6658321
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