• DocumentCode
    2152284
  • Title

    Efficient Implementation of Interpolation for AVS

  • Author

    Hu, Shu ; Zhang, Xiaoxia ; Yang, Zhigang

  • Volume
    3
  • fYear
    2008
  • fDate
    27-30 May 2008
  • Firstpage
    133
  • Lastpage
    138
  • Abstract
    The framework of current state-of-the-art video coding standard is block transform/block prediction hybrid based scheme. Sub-pixel motion compensation can reduce bit rate and improve the compressing efficiency in video coding, while sub-pixel interpolation can also bring great increment in computational complexity. In this paper, pipelined solutions to the interpolation in AVS are presented based on the digital signal processor (DSP) platform. The ways of optimizing the interpolation part of video encoder are discussed, and many optimization strategies, including algorithm level modification, refining C code, writing linear assembly, using DMA and organizing memory, are proposed to implement the video application system. The final simulated results prove that good DSP performance can be achieved when utilizing all these optimization strategies.
  • Keywords
    Bit rate; Computational complexity; Digital signal processing; Digital signal processors; Interpolation; Motion compensation; Signal processing algorithms; Video coding; Video compression; Writing; AVS; DSP; interpolation; optimization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image and Signal Processing, 2008. CISP '08. Congress on
  • Conference_Location
    Sanya, China
  • Print_ISBN
    978-0-7695-3119-9
  • Type

    conf

  • DOI
    10.1109/CISP.2008.58
  • Filename
    4566460