• DocumentCode
    2157178
  • Title

    Concurrent design of ESD protection and ICs for optimization and prediction

  • Author

    Wang, Aiping

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, CA, USA
  • fYear
    2013
  • fDate
    22-25 Sept. 2013
  • Firstpage
    1
  • Lastpage
    34
  • Abstract
    □ ESD failure is a killing factor to ICs □ On-chip ESD protection required for ICs □ Mixed-mode ESD design method for prediction □ ESD-IC co-design is important & feasible! □ Novel ESD design concept is the future.
  • Keywords
    electrostatic discharge; integrated circuit design; mixed analogue-digital integrated circuits; optimisation; ESD failure; ESD protection; IC; concurrent design; mixed-mode ESD design; optimization; Discharges (electric); Electromagnetic interference; Electrostatic discharges; Integrated circuits; Surge protection; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2013 IEEE
  • Conference_Location
    San Jose, CA
  • Type

    conf

  • DOI
    10.1109/CICC.2013.6658502
  • Filename
    6658502
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2157178