• DocumentCode
    2161634
  • Title

    Multifault testable circuits based on binary parity diagrams

  • Author

    Kundu, Sandip

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1994
  • fDate
    10-12 Oct 1994
  • Firstpage
    363
  • Lastpage
    366
  • Abstract
    We introduce a new class of binary graphs called binary parity diagrams (BPDs). Ordered binary parity diagram of a function is canonical. Importance of canonical forms in circuit verification is well known. Circuits derived on the basis of these diagrams are multifault testable. In this paper we focus on multifault testability property
  • Keywords
    logic circuits; logic testing; binary parity diagrams; circuit verification; multifault testable circuits; Binary decision diagrams; Boolean functions; Circuit testing; Data structures; Equations; Iron; Logic circuits; Wrist;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-6565-3
  • Type

    conf

  • DOI
    10.1109/ICCD.1994.331927
  • Filename
    331927
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2161634