DocumentCode
2162783
Title
An implementation technique of dynamic CMOS circuit applicable to asynchronous/synchronous logic
Author
Yoshizawa, Hiroyasu ; Taniguchi, Kenji ; Nakashi, Kenichi
Author_Institution
Graduate Sch. of Inf. Sci. & Electr. Eng., Kyushu Univ., Fukuoka, Japan
Volume
2
fYear
1998
fDate
31 May-3 Jun 1998
Firstpage
145
Abstract
An implementation technique of dynamic CMOS circuit is described. Based on the concept to represent the logic equation making use of the dynamic charge, most of asynchronous/synchronous logic can be implemented in dynamic CMOS circuit. In this paper, D-latch, D-Flip/Flop, JK-Flip/Flop and Phase Frequency Detector are shown that they can be implemented with the concept and technique and it is confirmed by SPICE simulation that they have a comparable or much better performance compared with the circuits designed with the transmission gate
Keywords
CMOS logic circuits; SPICE; asynchronous circuits; flip-flops; D-Flip/Flop; D-latch; JK-Flip/Flop; Phase Frequency Detector; SPICE simulation; asynchronous logic; dynamic CMOS circuit; synchronous logic; CMOS logic circuits; CMOS technology; Clocks; Equations; Inverters; Large scale integration; Latches; Logic circuits; Logic devices; Power dissipation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-4455-3
Type
conf
DOI
10.1109/ISCAS.1998.706862
Filename
706862
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