DocumentCode
2165413
Title
Low resistive and highly reliable copper interconnects in combination of silicide-cap with Ti-barrier for 32 nm-node and beyond
Author
Hayashi, Y. ; Matsunaga, N. ; Wada, M. ; Nakao, S. ; Watanabe, K. ; Sakata, A. ; Shibata, H.
Author_Institution
Center for Semicond. Res. & Dev., Toshiba Corp., Yokohama
fYear
2009
fDate
1-3 June 2009
Firstpage
252
Lastpage
254
Abstract
Silicide-cap for Cu interconnects is promising for enhancing electromigration (EM) performance for 32 nm-node and beyond. But the trade-off properties of silicide-cap between line resistance and EM lifetime remain to be resolved. Increasing of line resistance is caused by Si diffusion in Cu line. So, we focused on Ti barrier metal (BM), which diffuses in Cu line, and applied it in combination with silicide-cap, in order to keep Si stable at the surface of Cu line. As a result, we achieved EM median time-to-failure (MTF) 100 times longer than that of the sample w/o silicide-cap and Ta-BM while line resistance is kept lower. Activation energy (Ea)of EM of 1.45 eV is achieved.
Keywords
chemical interdiffusion; copper; electromigration; integrated circuit interconnections; tantalum; titanium; Cu-Ti-Si-Ta; Ti barrier; diffusion; electromigration median time-to-failure; highly reliable copper interconnects; line resistance; low resistive copper interconnects; silicide cap; Annealing; Copper; Electromigration; Electrons; Grain boundaries; Manufacturing processes; Semiconductor device reliability; Surface resistance; Temperature; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2009. IITC 2009. IEEE International
Conference_Location
Sapporo, Hokkaido
Print_ISBN
978-1-4244-4492-2
Electronic_ISBN
978-1-4244-4493-9
Type
conf
DOI
10.1109/IITC.2009.5090401
Filename
5090401
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