DocumentCode
2168056
Title
Thermal analysis of heterogeneous 3D ICs with various integration scenarios
Author
Ting-Yen Chiang ; Souri, S.J. ; Chi On Chui ; Saraswat, K.C.
Author_Institution
Dept. of Electr. Eng., Stanford Univ., CA, USA
fYear
2001
fDate
2-5 Dec. 2001
Abstract
Presents detailed thermal analysis of high performance three dimensional (3D) ICs under various integration schemes. The model incorporates the effect of vias and power consumption due to both devices in active layers and interconnect joule heating. The results show excellent agreement with the 3D finite element simulations using ANSYS. It is shown that under certain scenarios, 3D ICs can actually lead to better thermal performance than planar (2D) ICs. With the effect of vias, as efficient heat dissipation paths, taken into account, our model provides more realistic temperature rise estimation for 3D ICs. Furthermore, tradeoffs among power, performance, chip real estate and thermal impact for 3D ICs is evaluated. Finally, the thermal influence from incorporating RF circuits and optical interconnect on 3D ICs has been discussed.
Keywords
finite element analysis; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; low-power electronics; optical interconnections; thermal analysis; ANSYS; RF circuits; active layers; chip real estate; finite element simulations; heat dissipation paths; heterogeneous 3D ICs; interconnect joule heating; optical interconnect; power consumption; temperature rise estimation; thermal analysis; vias; Analytical models; Energy consumption; Heating; Integrated circuit interconnections; Optical interconnections; Radio frequency; System-on-a-chip; Temperature; Thermal conductivity; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location
Washington, DC, USA
Print_ISBN
0-7803-7050-3
Type
conf
DOI
10.1109/IEDM.2001.979599
Filename
979599
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