• DocumentCode
    2169716
  • Title

    Fully Depleted Double-Gate 1T-DRAM Cell with NVM Function for High Performance and High Density Embedded DRAM

  • Author

    Park, Ki-Heung ; Kim, Young Min ; Kwon, Hyuck-In ; Kong, Seong Ho ; Lee, Jong-Ho

  • Author_Institution
    Sch. of EECS, Kyungpook Nat. Univ., Daegu
  • fYear
    2009
  • fDate
    10-14 May 2009
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We have investigated a fully depleted double-gate 1-T DRAM cell device which has SONOS type storage node on control gate for nonvolatile memory function. Due to enlarged hole capacity by the large storage node and source/drain junction depth control in the floating body, we could improving data retention time, Is,(write"1")/Is,(write"0") and device scalability. Proposed device could be a very promising candidate for a future high density and high performance IT-DRAM cell.
  • Keywords
    DRAM chips; 1T-DRAM cell; SONOS type storage node; high density embedded DRAM; nonvolatile memory function; source-drain junction depth control; Character generation; Geometry; Impurities; Leakage current; MOSFETs; Nonvolatile memory; Random access memory; SONOS devices; Scalability; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Workshop, 2009. IMW '09. IEEE International
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    978-1-4244-3762-7
  • Type

    conf

  • DOI
    10.1109/IMW.2009.5090592
  • Filename
    5090592
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2169716