DocumentCode
2170088
Title
Multiplier-free IIR filter realizations with periodically time-varying coefficients
Author
Tantaratana, Sawasd
Author_Institution
Nat. Electron. & Comput. Technol. Center, Bangkok, Thailand
fYear
1996
fDate
18-21 Nov 1996
Firstpage
93
Lastpage
96
Abstract
In this paper, we extend the periodically time-varying (PTV) filter realization, which was proposed for the FIR filter, to be used for IIR filters. The realization consists of ternary ({0, ±1}) or quinary ({0, ±1, ±2}) PTV coefficients with simple input and output units. The coefficients as well as the input and output units require no hardware multiplier. This simplifies the layout for VLSI implementation and increases the processing speed
Keywords
IIR filters; VLSI; digital filters; filtering theory; IIR filter realizations; VLSI implementation; multiplier-free filter realizations; periodically time-varying coefficients; Delta-sigma modulation; Digital filters; Finite impulse response filter; Hardware; IIR filters; Poles and towers; Quantization; Read only memory; Registers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE Asia Pacific Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-3702-6
Type
conf
DOI
10.1109/APCAS.1996.569227
Filename
569227
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