DocumentCode
2170815
Title
Pipelined data parallel task mapping/scheduling technique for MPSoC
Author
Yang, Hoeseok ; Ha, Soonhoi
Author_Institution
Sch. of EECS, Seoul Nat. Univ., Seoul, South Korea
fYear
2009
fDate
20-24 April 2009
Firstpage
69
Lastpage
74
Abstract
In this paper, we propose a multi-task mapping/scheduling technique for heterogeneous and scalable MPSoC. To utilize the large number of cores embedded in MPSoC, the proposed technique considers temporal and data parallelisms as well as task parallelism. We define a multi-task mapping/scheduling problem with all these parallelisms and propose a QEA (quantum-inspired evolutionary algorithm)-based heuristic. Compared with an ILP (Integer Linear Programming) approach, experiments with real-life examples show the feasibility and the efficiency of the proposed technique.
Keywords
embedded systems; evolutionary computation; multiprocessing systems; parallel algorithms; pipeline processing; processor scheduling; system-on-chip; data parallelism; multitask scheduling technique; pipelined data parallel task mapping; quantum-inspired evolutionary algorithm-based heuristics; scalable MPSoC; task parallelism; Adaptive scheduling; Availability; Computer science; Degradation; Dynamic scheduling; Processor scheduling; Reliability engineering; Runtime; Scheduling algorithm; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location
Nice
ISSN
1530-1591
Print_ISBN
978-1-4244-3781-8
Type
conf
DOI
10.1109/DATE.2009.5090635
Filename
5090635
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