DocumentCode
2171467
Title
Self Aligned Barrier Approach: Overview on Process, Module Integration and Interconnect Performance Improvement Challenges
Author
Gosset, L.G. ; Chhun, S. ; Guillan, J. ; Gras, R. ; Flake, J. ; Daamen, R. ; Michelon, J. ; Haumesser, P.-H. ; Olivier, S. ; Decorps, T. ; Torres, J.
Author_Institution
R&D, Philips Semicond., Crolles
fYear
2006
fDate
5-7 June 2006
Firstpage
84
Lastpage
86
Abstract
Self aligned barriers approaches are widely investigated because they lead to a strong improvement of the Cu/barrier interface adhesion generally considered as the limiting factor for the electromigration performance of Cu interconnects capped with dielectric barriers. In this paper, several ways to perform self aligned barrier integration, using either Cu line surface treatments or selective deposition process on top of Cu lines and their basic performance are detailed. Achieved electrical and reliability performance are discussed in terms of process, integration feasibility and related issues, and architecture (stand-alone or bi-layered stack) since the self aligned barriers can be introduced at different levels of complexity depending on the performance targets and the applications foreseen
Keywords
MIM structures; copper; diffusion barriers; electromigration; integrated circuit interconnections; reliability; Cu; barrier interface adhesion; copper interconnects; copper line surface treatments; dielectric barrier; electrical performance; electromigration; interconnect performance improvement; module integration; reliability performance; selective deposition process; self aligned barrier; Adhesives; Copper; Degradation; Dielectric materials; Electromigration; Etching; Grain boundaries; Plasma applications; Silicon compounds; Surface treatment;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2006 International
Conference_Location
Burlingame, CA
Print_ISBN
1-4244-0104-6
Type
conf
DOI
10.1109/IITC.2006.1648653
Filename
1648653
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