• DocumentCode
    2171655
  • Title

    Electromigration Reliability of 60 nm Dual Damascene Cu Interconnects

  • Author

    Pyun, J.W. ; Baek, W.-C. ; Denning, D. ; Knorr, A. ; Smith, L. ; Pfeifer, K. ; Ho, P.S.

  • Author_Institution
    Microelectron. Res. Center, Texas Univ., Austin, TX
  • fYear
    2006
  • fDate
    5-7 June 2006
  • Firstpage
    107
  • Lastpage
    109
  • Abstract
    Electromigration (EM) reliability was investigated for 60 nm wide lines fabricated using a SiON (siliconoxynitride) trench-filling process. EM was observed to be dominated by intrinsic failures due to void formation in the line trench. The lifetime was longer than that of a standard damascene structure, which can be attributed to a distinct via/metal-1 configuration in reducing process-induced defects at the via interface. The line scaling effect on EM reliability was investigated using three different line widths: 60 nm, 110 nm, and 185 nm. EM lifetimes were found to be similar for the different line widths, which is consistent with intrinsic failures due to void formation in the line trench. With a dense and stable SiON filling layer, the processing and thickness effects of the Ta barrier on EM reliability were found to be less significant than for Cu/low-k structures. Multi-linked EM test structures revealed no early failure in the 60 nm samples with a SiON filling layer, although process control of line dimension and geometry remained an issue
  • Keywords
    copper; electromigration; integrated circuit interconnections; integrated circuit reliability; process control; silicon compounds; tantalum; voids (solid); 110 nm; 185 nm; 60 nm; Cu; EM reliability; SiON; Ta; dual damascene copper interconnects; electromigration reliability; line scaling effect; multi-linked EM test structures; process-induced defects; siliconoxynitride trench-filling process; void formation; Electromigration; Filling; Laboratories; Microelectronics; Packaging; Partial response channels; Performance evaluation; Postal services; Statistical analysis; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference, 2006 International
  • Conference_Location
    Burlingame, CA
  • Print_ISBN
    1-4244-0104-6
  • Type

    conf

  • DOI
    10.1109/IITC.2006.1648659
  • Filename
    1648659