Performance evaluation of CNTFET based dynamic dual edge triggered register

Author

Murotiya, Sneh Lata ; Gupta, Arpan

Author_Institution

Electr. & Electron. Dept., Birla Inst. of Technol. & Sci., Pilani, India

fYear

2013

fDate

21-23 Sept. 2013

Firstpage

180

Lastpage

183

Abstract

Carbon Nanotube Field-Effect Transistor (CNTFET) with 1-D band structure providing better electrostatic control and high mobility due to ballistic transport operation has proved to be a promising alternative to the conventional CMOS technology. This paper presents a design, performance evaluation and comparative analysis for CNTFET based Dynamic Dual Edge Triggered D-Flip flop (DFF). Hspice simulation results shows that the presented DFF consumes significantly lower power and delay than its CMOS counterpart at 32 nm technology. The performance analysis of Serial in serial out register (SISO) based on these DFFs shows 88% reductions in the power delay product.

Keywords

CMOS integrated circuits; carbon nanotube field effect transistors; electrostatics; flip-flops; trigger circuits; 1D band structure; CNTFET; DFF; Hspice simulation; SISO; ballistic transport operation; carbon nanotube field effect transistor; conventional CMOS technology; dynamic dual edge triggered D-flip flop; dynamic dual edge triggered register; electrostatic control; mobility; power delay product; serial out register; size 32 nm; CMOS integrated circuits; CMOS technology; CNTFETs; Clocks; Integrated circuit modeling; Logic gates; CMOS; CNTFET; Dual Edge Triggered DFF; FF; LSFR; SISO;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Electronic Systems (ICAES), 2013 International Conference on

Conference_Location

Pilani

Print_ISBN

978-1-4799-1439-5

Type

conf

DOI

10.1109/ICAES.2013.6659387

Filename

6659387