DocumentCode
2173466
Title
A power-efficient migration mechanism for D-NUCA caches
Author
Bardine, A. ; Comparetti, M. ; Foglia, P. ; Gabrielli, G. ; Prete, C.A.
Author_Institution
Dipt. di Ing. dell´´Inf., Univ. di Pisa, Pisa
fYear
2009
fDate
20-24 April 2009
Firstpage
598
Lastpage
601
Abstract
D-NUCA L2 caches are able to tolerate the increasing wire delay effects due to technology scaling thanks to their banked organization, broadcast line search and data promotion/demotion mechanism. Data promotion mechanism aims at moving frequently accessed data near the core, but causes additional accesses on cache banks, hence increasing dynamic energy consumption. We shown how, in some cases, this migration mechanism is not successful in reducing data access latency and can be selectively and dynamically inhibited, thus reducing dynamic energy consumption without affecting performances.
Keywords
CMOS integrated circuits; cache storage; CMOS technology; data demotion mechanism; data promotion mechanism; dynamic energy consumption; power-efficient migration mechanism; wire delay; Bandwidth; Broadcast technology; Broadcasting; CMOS technology; Clocks; Delay effects; Energy consumption; Frequency; Size control; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location
Nice
ISSN
1530-1591
Print_ISBN
978-1-4244-3781-8
Type
conf
DOI
10.1109/DATE.2009.5090736
Filename
5090736
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