Performance analysis of augmented RAC codes under memoryless conditions

Augmentation of row and column (RAC) array codes based on single parity check codes is presented. The augmentation is performed by superimposition of information bits to parity check positions of the original RAC code. The augmentation technique has a simple construction procedure and allows us to create new codes from existing ones. A compact trellis diagram of these codes has been constructed. Maximum-likelihood decoding using either hard-decision or soft-decision detection schemes using a trellis diagram has been implemented and results are presented. Code rate improvements and performance characteristics of the augmentation technique are given.