A modular and scalable ATM switch using shared buffer architecture

Author

Park, Young-Keun ; Lee, Gyungho

Author_Institution

Dept. of Electr. Eng., Yonsei Univ., Seoul, South Korea

fYear

1996

fDate

18-21 Nov 1996

Firstpage

318

Lastpage

321

Abstract

Advances in VLSI technology have brought us completely new design principles for the high-performance switching fabrics including ATM switches. From a practical point of view, port scalability of ATM switches emerges as an important issue in the switch design. In this paper, we propose a practically implementable large scale ATM switch by, integrating time-division and space-division switch architectures. We present a scalable shared buffer type switch and its expansion method

Keywords

B-ISDN; VLSI; asynchronous transfer mode; electronic switching systems; semiconductor switches; timing; VLSI technology; expansion method; modular ATM switch; port scalability; scalable ATM switch; shared buffer architecture; space-division switch architecture; time-division switch architecture; Asynchronous transfer mode; Bandwidth; Fabrics; Large scale integration; Packet switching; Routing; Scalability; Switches; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1996., IEEE Asia Pacific Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-3702-6

Type

conf

DOI

10.1109/APCAS.1996.569280

Filename

569280

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2184268