Double cipher implementation in a ubiquitous processor chip

This paper focuses on improving the cipher strength of a particular ubiquitous processor HCgorilla. The reason why this is called the ubiquitous processor is because it progresses the overall status of ubiquitous and processor techniques. Ubiquitous computing is really a leading edge trend of next generation information and communication technologies. One of the most promising solutions for ubiquitous computing is exploiting not higher speed but parallelism in advanced circuits. In order to do this, it is really worthwhile to exploit hardware parallelism. Actually, the basic organization of HCgorilla follows multicore and multiple pipelines. These are Java compatible media pipes and cipher pipes. While the cipher pipe has been so far built in only one hardware RNG (random number generators), the improved HCgorilla makes it to have two RNGs. The novelty of this study is to use them for double cipher, that is, the one for transposition cipher called RAC (random number addressing cryptography) and the other for a substitution cipher by data sealing. Various aspects of the improved HCgorilla are studied. Those are the alternatives to this design, internal architectures or algorithms, comparison results with conventional works, encryption/decryption performance, the benefits and costs of this approach, new knowledge to be drawn from this design. According to evaluation, the double cipher promises practically secure strength without any overhead.