• DocumentCode
    2191784
  • Title

    An algorithm for reduced order modelling of digital controllers

  • Author

    Sahani, A.K. ; Nagar, S.K. ; Pal, Jayanta

  • Author_Institution
    Dept. of Electr. Eng., Banaras Hindu Univ., Varanasi, India
  • Volume
    1
  • fYear
    2000
  • fDate
    19-22 Jan. 2000
  • Firstpage
    753
  • Abstract
    An algorithm for designing reduced order digital controller which can replace an existing high order cascade digital controller is presented. The parameters of the reduced order controller are obtained by applying frequency response technique. The new algorithm is illustrated by some examples.
  • Keywords
    control system analysis; digital control; frequency response; reduced order systems; digital controllers; frequency response technique; high order cascade digital controller; reduced order modelling; Algorithm design and analysis; Control systems; Costs; Design methodology; Digital control; Error correction; Frequency response; Hardware; Open loop systems; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Technology 2000. Proceedings of IEEE International Conference on
  • Print_ISBN
    0-7803-5812-0
  • Type

    conf

  • DOI
    10.1109/ICIT.2000.854264
  • Filename
    854264
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2191784