Evolvable hardware for the generation of sequential filter circuits

Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified approach, which mixes the creation of a sequential circuit, with the scheduling and binding of operations. This paper describes how Finite Impulse Response Primitive Operator Filters (FIR POFs) can be created so that they operate sequentially, over two cycles. These filters meet a frequency domain specification, and are also optimised for area and delay. The circuits that were created have a lower area than equivalent, purely combinatorial circuits. The technique described here should be applicable to other digital circuit creation problems, and to the problem of creating a sequential circuit that operates over more than two cycles. Both of these possibilities are investigated.