DocumentCode
2197337
Title
On system-level use of BIST for programmable Input/Output buffers in FPGAs
Author
Dutton, Bradley F. ; Lerner, Lee W. ; Vemula, Sudheer ; Stroud, Charles E.
Author_Institution
Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA
fYear
2010
fDate
18-21 March 2010
Firstpage
506
Lastpage
509
Abstract
We describe a Built-in Self-Test (BIST) approach that was developed for the programmable Input/Output (I/O) buffers in Field Programmable Gate Arrays (FPGAs). The approach is unique when compared with previous work because the I/O buffers are tested separately from the other programmable logic in the I/O cells. The capabilities and limitations of system-level use of this I/O buffer BIST are discussed in conjunction with experimental results from the implementation and actual use of the approach in systems.
Keywords
buffer circuits; built-in self test; field programmable gate arrays; logic testing; programmable logic devices; FPGA; built-in self-test approach; field programmable gate arrays; programmable input-output buffers; system-level usage; Built-in self-test; Field programmable gate arrays; Light emitting diodes; Logic devices; Logic testing; Programmable logic arrays; Programmable logic devices; Routing; System testing; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
IEEE SoutheastCon 2010 (SoutheastCon), Proceedings of the
Conference_Location
Concord, NC
Print_ISBN
978-1-4244-5854-7
Type
conf
DOI
10.1109/SECON.2010.5453818
Filename
5453818
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