• DocumentCode
    2198337
  • Title

    Test Roles in Diagnosis and Silicon Debug

  • Author

    Uzzaman, Anis ; Muradali, Fidel ; Aikyo, Takashi ; Aitken, Robert ; Jackson, Tom ; Galivanche, Rajesh ; Onodera, Takeshi

  • Author_Institution
    Cadence Design Syst., San Jose
  • fYear
    2007
  • fDate
    8-11 Oct. 2007
  • Firstpage
    367
  • Lastpage
    367
  • Abstract
    Test catches defective parts. Traditional DFT makes test-related activities more cost effective. Debug and diagnosis discovers why a design or part did not work. Yield relates to how many good parts can be shipped thus how many dollars can be received. As one would expect, all these areas are related. The issue becomes: Can information from one operation be geared to better another? This panel specifically considers how test/ DFT can aid in debug & diagnosis. The discussion is then extended to capture the impact on yield management in riskier contemporary and future processes. Over the past few decades, each of the above domains have gone through cycles of research, development, maturity and overhaul to adapt to changes in the process & product environment. In fact, because increasing degrees of uncertainty is introduced with modern nanometer processes, debug & diagnosis and yield management are becoming more recognized and valued portions of the product creation flow. To forward this, test and DFT functions are experiencing re-development. In building, executing and sustaining a competence, key issues include time & information. That is, the problem must be understood, solved in for the short term and solved for the long term. In addition, solution scope must be properly framed and, if possible, adaptable to unexpected changes in the process and tooling environments. It is well recognized that information availability and access are pillars of a debug/ diagnosis solution. DFT structures, design automation tooling, test programs, ATE applications and physical failure analysis are means to a bulk of this data. The follow through is the assimilation of this data into a yield management and test quality system. As the topic is broad, panel of test experts will focus on practical experiences concerning the use of test, crafted DFT or test environments to facilitate debug and diagnosis. Precise developments in tying debug/ diagnosis to yield managemen- - t will also be discussed.
  • Keywords
    automatic test equipment; design for testability; silicon; ATE; DFT; automatic test equipment; design automation tooling; diagnosis; failure analysis; silicon debug; test programs; test roles; Automatic testing; Costs; Design automation; Design for testability; Failure analysis; Quality management; Risk management; Silicon; System testing; Uncertainty;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Asian Test Symposium, 2007. ATS '07. 16th
  • Conference_Location
    Beijing
  • ISSN
    1081-7735
  • Print_ISBN
    978-0-7695-2890-8
  • Type

    conf

  • DOI
    10.1109/ATS.2007.112
  • Filename
    4388040