Single event effect characteristics of CMOS devices employing various epi-layer thicknesses

Author

LaBel, Kenneth A. ; Hawkins, Donald K. ; Kinnison, James A. ; Stapor, William P. ; Marshall, Paul W.

Author_Institution

NASA Goddard Space Flight Center, Greenbelt, MD, USA

fYear

1995

fDate

18-22 Sep 1995

Firstpage

258

Lastpage

262

Abstract

Latchup resistant process, combined with SEU mitigation circuitry, may provide sufficient protection for many satellite applications. We report proton and heavy ion cross section measurements to illustrate the epitaxial layer thickness dependence on a First-in, First-out (FIFO) memory and microprocessor devices fabricated in a commercial CMOS/EPI process

Keywords

CMOS digital integrated circuits; integrated circuit measurement; ion beam effects; ion beams; proton effects; space vehicle electronics; CMOS devices; CMOS/EPI process; FIFO memory; SEU mitigation circuitry; epi-layer thicknesses; heavy ion cross section measurements; latchup resistant process; microprocessor devices; proton cross section measurements; satellite applications; single event effect characteristics; CMOS process; Central Processing Unit; Epitaxial layers; Laboratories; Protection; Protons; Single event upset; Space vehicles; Testing; Thickness measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and its Effects on Components and Systems, 1995. RADECS 95., Third European Conference on

Conference_Location

Arcachon

Print_ISBN

0-7803-3093-5

Type

conf

DOI

10.1109/RADECS.1995.509787

Filename

509787