DocumentCode
2201633
Title
Equivalence fault collapsing for transistor leakage faults
Author
Xiaoqing, Wen ; Saluja, Kewal K. ; Kinoshita, Kozo ; Tamamoto, Hideo
Author_Institution
Dept. of Inf. Eng., Akita Univ., Japan
fYear
1996
fDate
24-25 Oct. 1996
Firstpage
79
Lastpage
83
Abstract
This paper presents an innovative method of equivalence fault collapsing for the transistor leakage faults, a fault model often used in I/sub DDQ/ testing. The experimental results show the effectiveness of the proposed method in reducing the number of faults that have to be considered and its usefulness in I/sub DDQ/ testing.
Keywords
CMOS digital integrated circuits; CMOS logic circuits; fault diagnosis; integrated circuit testing; leakage currents; logic testing; CMOS static ICs; I/sub DDQ/ testing; equivalence fault collapsing; fault model; transistor leakage faults; CMOS logic circuits; Circuit faults; Circuit simulation; Circuit testing; Fault detection; Fault diagnosis; Fault location; Leakage current; Logic testing; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
IDDQ Testing, 1996., IEEE International Workshop on
Conference_Location
Washington, DC, USA
Print_ISBN
0-8186-7655-8
Type
conf
DOI
10.1109/IDDQ.1996.557836
Filename
557836
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