Low-power Fuzzy Logic VLSI implementation with asynchronous topology for neuronal sensors

Author

Morshed, B.I. ; Consul-Pacareu, S.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Memphis, Memphis, TN, USA

fYear

2012

fDate

16-18 March 2012

Firstpage

47

Lastpage

48

Abstract

Embedded systems for ubiquitous sensing towards the next-generation cyber-physical systems require low-power design approaches. A non-traditional low-power asynchronous circuit design for Fuzzy Logic rule-block is presented in this paper. The developed low-power architecture of the Fuzzy rule blocks consumes 197.2 μW for 3 rules using CMOS 0.13 micron technology. Implementation with an asynchronous topology reduced the power consumption to 64.5 μW. Such low-power controllers would be attractive for embedded neuronal sensors powered by energy scavenging.

Keywords

CMOS integrated circuits; VLSI; biomedical electronics; biomedical engineering; embedded systems; fuzzy logic; low-power electronics; neurophysiology; power consumption; ubiquitous computing; CMOS 0.13 micron technology; VLSI implementation; asynchronous topology; embedded neuronal sensors; energy scavenging; fuzzy logic; low-power asynchronous circuit design; low-power design; neuronal sensors; next-generation cyber-physical systems; power 197.2 muW; power 64.5 muW; power consumption; size 0.13 mum; ubiquitous sensing; Computers; Fuzzy logic; Power demand; Sensors; Topology; Transient analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Bioengineering Conference (NEBEC), 2012 38th Annual Northeast

Conference_Location

Philadelphia, PA

ISSN

2160-7001

Print_ISBN

978-1-4673-1141-0

Type

conf

DOI

10.1109/NEBC.2012.6206955

Filename

6206955