• DocumentCode
    2204117
  • Title

    Low Energy Partial Tag Comparison Cache Using Valid-bit Pre-decision

  • Author

    Peng, Manman ; Pan, Yi ; Liu, Bin

  • Author_Institution
    Sch. of Comput. & Commun., Hunan Univ., Changsha
  • fYear
    2006
  • fDate
    14-17 Nov. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Set-associative caches achieve low miss rates for typical applications but result in significant energy dissipation. For low energy, we introduce a new cache design, partial tag comparison cache using valid-bit pre-decision (PTC-V cache), which can efficiently save the energy dissipation of the sense amps and bits-line parts. We used the CACTI cache model to evaluate the proposed cache architecture and the Simplescalar CPU simulator to produce the final result on SPEC95. The power simulation result show that our modified partial tag comparison cache can save 55% of instruction cache´s accessing energy
  • Keywords
    cache storage; content-addressable storage; memory architecture; power consumption; CACTI cache model; SPEC95; Simplescalar CPU simulator; cache architecture; cache design; energy dissipation; instruction cache access energy; partial tag comparison cache; power simulation; set-associative caches; valid-bit pre-decision; Application software; Cache memory; Central Processing Unit; Circuits; Computational modeling; Computer architecture; Energy consumption; Energy dissipation; Filters; Phased arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON 2006. 2006 IEEE Region 10 Conference
  • Conference_Location
    Hong Kong
  • Print_ISBN
    1-4244-0548-3
  • Electronic_ISBN
    1-4244-0549-1
  • Type

    conf

  • DOI
    10.1109/TENCON.2006.344197
  • Filename
    4142385