DocumentCode
2204521
Title
3D integrated circuit using large grain polysilicon film
Author
Chan, Victor W.C. ; Chan, Philip C.H. ; Mansun Chan
Author_Institution
Dept. of Electron. & Electr. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume
1
fYear
2001
fDate
2001
Firstpage
58
Abstract
3-D CMOS IC technology built on two layers of large grain polysilicon is presented. These stacked layers are vertically interconnected allowing shorter interconnect to improve the logic speed. The large grain polysilicon-on-insulator (LPSOI) film is formed by the recrystallization of amorphous silicon through Metal Induced Lateral Crystallization (MILC). The crystallization region obtained can cover multiple transistors and the grain size is much larger than the transistor size. An oxide layer separates two layers of devices and forms an interlayer dielectric. The electrical performance of the LPSOI devices is presented. Inverters, ring-oscillators and shift registers further confirm that the recrystallized techniques forming the 3-D structures are feasible
Keywords
CMOS integrated circuits; grain size; integrated circuit technology; recrystallisation; silicon-on-insulator; 3D CMOS IC technology; 3D integrated circuits; LPSOI devices; Si; amorphous Si; grain size; interlayer dielectric; inverters; large grain polysilicon film; logic speed; metal induced lateral crystallization; oxide layer; polysilicon-on-insulator film; recrystallization; ring-oscillators; shift registers; stacked layers; vertically interconnected; Amorphous silicon; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Crystallization; Integrated circuit interconnections; Integrated circuit technology; Logic devices; Semiconductor films; Three-dimensional integrated circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6520-8
Type
conf
DOI
10.1109/ICSICT.2001.981424
Filename
981424
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