• DocumentCode
    2204559
  • Title

    A diagrammatic approach to multi-level logic synthesis

  • Author

    Akers, Sheldon B., Jr.

  • fYear
    1964
  • fDate
    11-13 Nov. 1964
  • Firstpage
    165
  • Lastpage
    173
  • Abstract
    A diagrammatic approach to the problem of synthesizing multi-level logic functions is presented. It has the advantage of giving a visual interpretation to such abstract concepts as fan-in, levels of logic, decomposition, and two-level forms.
  • Keywords
    Inverters; Laboratories; Logic functions; Terminology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Switching Circuit Theory and Logical Design, 1964 Proceedings of the Fifth Annual Symposium on
  • Conference_Location
    Princeton, NJ, USA
  • Type

    conf

  • DOI
    10.1109/SWCT.1964.2
  • Filename
    4569818