DocumentCode
2205295
Title
UltraSMART: a scalable multiprocessor architecture for real time
Author
Boxer, Aaron ; Malek, Dan
Author_Institution
Concurrent Comput. Corp., Westford, MA, USA
fYear
1994
fDate
15-17 Jun 1994
Firstpage
118
Lastpage
123
Abstract
Concurrent Computer Corporation´s UltraSMART (scalable multiprocessor architecture for real time) architecture is a busless distributed shared memory multiprocessor architecture that enables higher levels of performance and better real-time behavior than can be obtained with bus-based global shared memory multiprocessors. The paper describes UltraSMART, the UltraSMART-based MAXION multiprocessor system, and the UltraSMART enhancements to the RTU operating system
Keywords
distributed memory systems; real-time systems; shared memory systems; Concurrent Computer Corporation; MAXION multiprocessor system; RTU operating system; UltraSMART; busless distributed shared memory multiprocessor architecture; real time; real-time behavior; scalable multiprocessor architecture; Bandwidth; Computer architecture; Concurrent computing; Distributed computing; Memory architecture; Microprocessors; Operating systems; Real time systems; System buses; Time sharing computer systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time Systems, 1994. Proceedings., Sixth Euromicro Workshop on
Conference_Location
Vaesteraas
Print_ISBN
0-8186-6340-5
Type
conf
DOI
10.1109/EMWRTS.1994.336855
Filename
336855
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