Effects of magnetic fields in the plasma chamber on hot-carrier response of CMOS devices

Author

Oner, M. ; Janapaty, V. ; Bui, N. ; Bhuva, B. ; Kems, S.

Author_Institution

Dept. of Electr. & Comput. Eng., Vanderbilt Univ., Nashville, TN, USA

fYear

1998

fDate

4-5 Jun 1998

Firstpage

108

Lastpage

111

Abstract

During plasma etching, the presence of magnetic fields in the plasma chamber induces voltages in the metal interconnects. This induced voltage is superimposed on top of the charging voltages generated due to plasma charging. This paper describes our efforts to characterize the effects of these magnetic-field-induced voltages on the hot-carrier response of CMOS devices

Keywords

CMOS integrated circuits; hot carriers; integrated circuit interconnections; integrated circuit metallisation; integrated circuit testing; magnetic fields; plasma materials processing; sputter etching; surface charging; CMOS devices; charging voltages; hot-carrier response; magnetic field induced voltages; magnetic fields; magnetic-field-induced voltages; metal interconnects; plasma chamber; plasma chamber magnetic field effects; plasma charging; plasma etching; superimposed induced voltage; Diodes; Etching; Hot carrier effects; Hot carriers; Magnetic fields; Plasma applications; Plasma devices; Plasma materials processing; Plasma properties; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma Process-Induced Damage, 1998 3rd International Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

0-9651577-2-5

Type

conf

DOI

10.1109/PPID.1998.725586

Filename

725586