DocumentCode
2207980
Title
Parallel processing of digital images using a modular architecture
Author
Papadopoulos, C.A. ; Clarkson, T.G.
Author_Institution
Kings Coll. London, UK
fYear
1991
fDate
2-6 Sep 1991
Firstpage
99
Lastpage
104
Abstract
Describes a parallel modular architecture that can perform high speed image processing by implementing digital signal processing algorithms in hardware. Speed performance is enhanced by the fact that different modules can be working simultaneously in parallel, on the same or a different set of data. The authors look in detail at how one of the parallel modules operates, and they propose how the system can be used to compress the data required to send or store a sequence of image frames, by encoding changes in consecutive frames in terms of geometric transformations
Keywords
computerised picture processing; data compression; digital signal processing chips; parallel algorithms; parallel architectures; data compression TMS34010 graphics system processor; digital images; digital signal processing algorithms; geometric transformations; high speed image processing; microprocessor; parallel modular architecture; parallel processing;
fLanguage
English
Publisher
iet
Conference_Titel
Digital Processing of Signals in Communications, 1991., Sixth International Conference on
Conference_Location
Loughborough
Print_ISBN
0-85296-522-2
Type
conf
Filename
151910
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