DocumentCode
2210830
Title
An SOI CMOS, high gain and low noise transimpedance-limiting amplifier for 10Gb/s applications
Author
Pera, Florin ; Voinigescu, Sorin P.
Author_Institution
Innovative Syst. & Technol. Corp., Kanata, Ont.
fYear
2006
fDate
11-13 June 2006
Lastpage
360
Abstract
This paper presents a low noise, high gain transimpedance-limiting amplifier (TIALA) design for 10Gb/s applications, implemented in a 0.13mum SOI CMOS technology. Powered from a single 1.5V supply and consuming 165mW, the TIALA features auto-zero DC feedback and has 25muApp input current sensitivity (an estimated -16dBm optical sensitivity) with over 40dB electrical dynamic range and 14 kOhm linear gain
Keywords
CMOS integrated circuits; low noise amplifiers; operational amplifiers; silicon-on-insulator; 0.13 micron; 1.5 V; 10 Gbit/s; 14 kohm; 165 mW; 25 muA; SOI CMOS technology; TIALA design; auto-zero DC feedback; input current sensitivity; optical sensitivity; transimpedance-limiting amplifier design; CMOS technology; Capacitors; Circuit noise; Germanium silicon alloys; Inductors; Low-noise amplifiers; MOS devices; Optical amplifiers; Silicon germanium; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-9572-7
Type
conf
DOI
10.1109/RFIC.2006.1651165
Filename
1651165
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