Systematic design methodology for on-chip transformers with patterned ground shield

In this paper, we present a systematic design procedure for on-chip transformers with patterned ground shield fabricated in silicon IC technology. The design procedure is based on transformers key geometrical parameters, on process technology specifications, and on a wide-band and compact equivalent circuit model for on-chip transformers. The main aim is to provide designer with transformers with appropriate transformation ratio, optimum insertion loss at the targeted work frequency, and designated primary and secondary inductance values. Verification with measurement data from SiGe process demonstrates performance prediction and excellent scalability of the design methodology. This technique is suitable for design and optimization of Si-based RF integrated circuit applications