• DocumentCode
    2212093
  • Title

    Effect Of Layout On Gate Oxide Defects At Gate Edges

  • Author

    Jiang, Chun ; Pramanik, Dipankar ; Gabriel, Calvin

  • Author_Institution
    VLSI Technology, Inc.
  • fYear
    1993
  • fDate
    24-27 Oct 1993
  • Firstpage
    113
  • Lastpage
    116
  • Keywords
    Antenna measurements; CMOS technology; Capacitors; Circuit testing; Dielectric breakdown; Lead compounds; Semiconductor device measurement; Stress; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 1993 International
  • Type

    conf

  • DOI
    10.1109/IRWS.1993.666299
  • Filename
    666299