An SRAM-based FPGA architecture

Author

Gould, Scott ; Worth, Brian ; Clinton, Kim ; Millham, Eric ; Keyser, Fran ; Palmer, Ron ; Hartman, Steve ; Zittritsch, Terry

Author_Institution

Dept. of Microelectron., IBM Corp., Essex Junction, VT, USA

fYear

1996

fDate

5-8 May 1996

Firstpage

243

Lastpage

246

Abstract

An SRAM-based FPGA architecture has been developed using a licensed AT6000 architecture base. The logic-cell architecture exploits an efficient, medium-grained, fixed library cell that implements most frequently used synthesis functions. An internal routing structure enables dense designs using a highly connected grid-based routing system and a dedicated I/O routing structure that supports the highest I/O counts available. Dynamic reconfiguration is retained with an underlying SRAM structure like the AT6000

Keywords

SRAM chips; circuit layout CAD; field programmable gate arrays; integrated circuit layout; logic CAD; network routing; AT6000 architecture base; SRAM-based FPGA architecture; dedicated I/O routing structure; dense designs; dynamic reconfiguration; highly connected grid-based routing system; internal routing structure; logic-cell architecture; medium-grained fixed library cell; Field programmable gate arrays; Inverters; Libraries; Logic arrays; Logic design; Logic devices; Random access memory; Routing; Switches; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Conference_Location

San Diego, CA

Print_ISBN

0-7803-3117-6

Type

conf

DOI

10.1109/CICC.1996.510551

Filename

510551