DocumentCode
2218131
Title
Analyzing the benefits of a separate processor to handle messages for fine-grain multithreading
Author
Metz, David ; Lee, Bang-Wook
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear
1995
fDate
25-28 Oct 1995
Firstpage
170
Lastpage
173
Abstract
This paper discusses the benefits of incorporating a separate processor into a processor node of Massively Parallel Architectures to handle messages and proposes hardware solutions to provide atomicity between the main processor and the processor dedicated to handle messages. The proposed design is aimed at improving the performance by relegating the responsibility of handling messages to a separate processor. The hardware modifications are kept to a minimum in order not to disturb the original functionality of a modern RISC processor
Keywords
parallel architectures; reduced instruction set computing; Massively Parallel Architectures; atomicity; fine-grain multithreading; message handling; messages; separate processor; Assembly; Counting circuits; Delay; Hardware; Multithreading; Parallel architectures; Parallel processing; Reduced instruction set computing; Switches; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing, 1995. Proceedings. Seventh IEEE Symposium on
Conference_Location
San Antonio, TX
ISSN
1063-6374
Print_ISBN
0-81867195-5
Type
conf
DOI
10.1109/SPDP.1995.530680
Filename
530680
Link To Document