DocumentCode
2220667
Title
Isomorph-redundancy in sequential circuits
Author
Das, Debesh K. ; Bhattacharya, Uttam K. ; Bhattacharya, Bhargab B.
Author_Institution
Dept. of Comput. Sci. & Eng., Jadavpur Univ., Calcutta, India
fYear
1996
fDate
28 Apr-1 May 1996
Firstpage
463
Lastpage
468
Abstract
An isomorph fault in a sequential circuit makes the state diagram of the faulty machine identical to that of the fault-free machine, under the renaming of states. However, no example of a reduced sequential machine whose circuit realization is combinationally irredundant but isomorph-redundant, is yet known. This paper shows that an infinite family of such circuits can be constructed with isomorph-redundancy. Isomorph faults are then classified into various types. Their properties reveal new insight and understanding of redundancy in sequential circuits
Keywords
VLSI; design for testability; integrated circuit testing; logic design; logic testing; redundancy; sequential circuits; DFT; infinite family; isomorph-redundancy; reduced sequential machine; sequential circuits; state diagram; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Hardware; Logic design; Logic testing; Redundancy; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location
Princeton, NJ
ISSN
1093-0167
Print_ISBN
0-8186-7304-4
Type
conf
DOI
10.1109/VTEST.1996.510894
Filename
510894
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