Edge based layout compaction

Author

Chen, Shuilong ; He, Xiangqing ; Yang, Zhilian

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2001

fDate

2001

Firstpage

198

Lastpage

201

Abstract

With the development of circuit design and technology, technology always changes so rapidly that all the layout must be redrawn due to the technology changes, this always takes lots of human labor and consumes a lot of time in tedious layout redrawing. In this paper, an edge based layout reuse (technology migration) technique is proposed; this method uses constraint graph approach and it is different from other constraint graph based compaction algorithms in that it can improve the shape of the layout figures because it is edge based, some badly shaped figures are optimized while design rules are still obeyed. The edge based layout compaction is used for full custom SRAM design and gets a reasonably good result

Keywords

application specific integrated circuits; circuit layout CAD; constraint theory; graph theory; integrated circuit design; logic CAD; constraint graph approach; design rules; edge based layout compaction; full custom SRAM design; layout figures; layout redrawing; technology migration; Algorithm design and analysis; Circuit synthesis; Compaction; Constraint optimization; Design optimization; Helium; Humans; Image segmentation; Microelectronics; Shape;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2001. Proceedings. 4th International Conference on

Conference_Location

Shanghai

Print_ISBN

0-7803-6677-8

Type

conf

DOI

10.1109/ICASIC.2001.982531

Filename

982531