A 1024-bit RSA crypto-coprocessor for smart cards

We propose a new VLSI architecture for high-radix modular multiplier to compute RSA public-key cryptosystem based on the modified Montgomery algorithm. A 1024-bit RSA crypto-coprocessor has been implemented based our proposed VLSI architecture. The proposed architecture is performed in a pipelined fashion and takes about u+6√u- clock cycles to compute one u-bit modular multiplication and about 1.5u(u+6√u) clock cycles to calculate u-bit modular exponentiation. The simulation shows that gate count of the processor is about 38K, and the time to calculate 1024-bit modular exponentiation is about 374ms at 5MHz. Compared with previous methods, our proposed architecture can achieve good performance in chip area and speed for smart cards