• DocumentCode
    2226716
  • Title

    Evaluation of phosphorus diffusion in the confined nano-wire under the influence of Si/SiO2 interface

  • Author

    Seike, Aya ; Sano, Itsutaku ; Yamada, Keisaku ; Ohdomari, Iwao

  • Author_Institution
    Sch. of Sci. & Eng., Waseda Univ., Tokyo
  • fYear
    2006
  • fDate
    Jan. 30 2006-Feb. 1 2006
  • Firstpage
    136
  • Lastpage
    145
  • Abstract
    Diffusion of phosphorus is studied by means of electrical measurement of the Si-wire devices and SIMS profiles of bulk SOI. The conductivity of Si-wire decreases as the thermal budget increases. The sample of 80 nm in the designed width (Wmask), of which the actual width after the oxidation is 57.4 nm, has higher conductivity, which is the factor of 3 to 4.5, with respect to the theoretical value of bulk Si. We assume that the stress applied from the peripheral SiO2 influence on the phosphorus diffusion in Si. Segregation of phosphorus ions at both cap-SiO2/Si(SOI) and Si(SOI)/SiO2(BOX) is recognized, however, no dependency of SIMS profiles on the thermal budget is confirmed. Dose loss of phosphorus due to the diffusion into the cap-SiO2 is about 1*1019 cm-3. The result of dependency of conductivity on the thermal budged doesnpsilat coincide with the data of SIMS profiles. This is because the SIMS profile of bulk sample doesnpsilat provide the lateral information nor reflect the effect of stress from the peripheral SiO2 film. Further investigation will be needed to reveal the relation between the size effect on the conductivity and the stress from the peripheral SiO2.
  • Keywords
    diffusion; electrical conductivity; nanowires; phosphorus; segregation; silicon-on-insulator; P; SOI; Si-SiO2; Si-wire devices; conductivity; confined nanowire; phosphorus diffusion; secondary ion mass spectra; segregation; size 57.4 nm; Dielectric films; Dry etching; Electrodes; Lithography; MOSFETs; Nanoscale devices; Thermal conductivity; Thermal stresses; Transistors; Wire; IV characterization; SIMS; Si nanowire; Si/SiO2 interface; diffusion; electrical properties; phosphorus; pile-up; segregatkon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nano CMOS, 2006 International Workshop on
  • Conference_Location
    Mishima
  • Print_ISBN
    978-1-4244-0603-6
  • Type

    conf

  • DOI
    10.1109/IWNC.2006.4570985
  • Filename
    4570985