Power supply noise coupling in a standard voltage reference circuit

Author

Ozbas, Murat ; Patru, Dorin ; Mukund, P.R.

Author_Institution

Dept. of Electr. Eng., Rochester Inst. of Technol., NY, USA

fYear

2003

fDate

17-20 Sept. 2003

Firstpage

319

Lastpage

322

Abstract

Power supply noise (PSN) coupling represents a challenge in the design of current and future analog and mixed-signal circuits. This paper studies the impact of PSN coupling on a key analog circuit building block: a voltage reference. A model representing the amount of noise coupling in the frequency domain is developed and verified through simulations. A design solution for increasing high frequency PSN rejection is identified and evaluated. Finally, the effect of technology scaling on PSN is studied in two successive CMOS processes.

Keywords

CMOS analogue integrated circuits; integrated circuit modelling; integrated circuit noise; mixed analogue-digital integrated circuits; reference circuits; CMOS processes; PSN coupling; analog circuits; frequency domain noise coupling model; high frequency PSN rejection; mixed-signal circuits; power supply noise coupling; technology scaling; voltage reference circuit; Analog circuits; CMOS process; CMOS technology; Circuit noise; Circuit simulation; Coupling circuits; Frequency domain analysis; Power supplies; Semiconductor device modeling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]

Print_ISBN

0-7803-8182-3

Type

conf

DOI

10.1109/SOC.2003.1241534

Filename

1241534