Method for Accelerated Determination of GaAs PHEMT Power Slump Reliability

Author

Yeats, Bob

Author_Institution

Agilent Technol., Santa Rosa

fYear

2007

fDate

14-14 Oct. 2007

Firstpage

3

Lastpage

20

Abstract

We have overcome difficulties associated with using the Single Device Lifetime Extraction (SDLE) method for analyzing power slump in PHEMTs. This allows rapid on-wafer assessment of power slump. We find that the voltage acceleration factor has the form exp(beta/(Vdg+Vbi)), where beta ~ 200 V is a typical acceleration parameter. We find that Ig is not an accelerator, in that this acceleration factor, which does not explicitly depend on Ig, is accurate over a wide voltage range over which Ig varies by a large factor (e.g., 8). That the acceleration factor in the on-state explicitly depends only on Vdg (and not Ig) has practical utility, since on-state Ig is relatively obscure to the designer.

Keywords

III-V semiconductors; gallium arsenide; high electron mobility transistors; semiconductor device reliability; GaAs; GaAs - Interface; PHEMT power slump reliability; accelerated determination; on wafer assessment; single device lifetime extraction; voltage acceleration factor; Acceleration; FETs; Gallium arsenide; PHEMTs; Power amplifiers; Power generation; Radio frequency; Semiconductor device modeling; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ROCS Workshop, 2007.[Reliability of Compound Semiconductors Digest]

Conference_Location

Portland, OR

Print_ISBN

978-0-7908-0115-5

Type

conf

DOI

10.1109/ROCS.2007.4391056

Filename

4391056