Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures

Reversible logic is emerging as a promising technology with applications in design of low power arithmetic and data path units for digital signal processing (DSP), quantum computing, nanotechnology, and optical computing. In this paper, the transistor realization of a new 4*4 reversible gate called "TSG" gate is presented. The proposed TSG gate has the ability to operate as a reversible full adder i.e. reversible full adder is implemented using a single gate. The transistor realizations of 1-bit reversible full adder, reversible ripple carry adder and reversible carry skip adder are also presented. In order to have the reduced transistor overhead of reversible carry skip adder, its modified design has been proposed. We also demonstrate a method to minimize the overhead in transistor implementation of reversible arithmetic units. The transistor implementation of reversible arithmetic circuits presented in this paper finds extensive applications in computationally intensive DSP tasks