DocumentCode
2242016
Title
Automatic Parallelization in a Binary Rewriter
Author
Kotha, Aparna ; Anand, Kapil ; Smithson, Matthew ; Yellareddy, Greeshma ; Barua, Rajeev
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
fYear
2010
fDate
4-8 Dec. 2010
Firstpage
547
Lastpage
557
Abstract
Today, nearly all general-purpose computers are parallel, but nearly all software running on them is serial. However bridging this disconnect by manually rewriting source code in parallel is prohibitively expensive. Automatic parallelization technology is therefore an attractive alternative. We present a method to perform automatic parallelization in a binary rewriter. The input to the binary rewriter is the serial binary executable program and the output is a parallel binary executable. The advantages of parallelization in a binary rewriter versus a compiler include (i) compatibility with all compilers and languages, (ii) high economic feasibility from avoiding repeated compiler implementation, (iii) applicability to legacy binaries, and (iv) applicability to assembly-language programs. Adapting existing parallelizing compiler methods that work on source code to work on binary programs instead is a significant challenge. This is primarily because symbolic and array index information used in existing compiler parallelizers is not available in a binary. We show how to adapt existing parallelization methods to achieve equivalent parallelization from a binary without such information. Preliminary results using our x86 binary rewriter called Second Write on a suite of dense-matrix regular programs including the externally developed Polybench suite of benchmarks shows an average speedup of 5.1 from binary and 5.7 from source with 8 threads compared to the input serial binary on an x86 Xeon E5530 machine, and 14.7 from binary and 15.4 from source with 32 threads compared to the input serial binary on a SPARC T2. Such regular loops are an important component of scientific and multi-media workloads, and are even present to a limited extent in otherwise non-regular programs.
Keywords
assembly language; automatic programming; parallel programming; program processors; rewriting systems; array index information; assembly language program; automatic parallelization; binary program; binary rewriter; compiler implementation; dense matrix regular program; general purpose computer; multimedia workload; polybench suite; secondwrite; serial binary executable program; source code; Affine Dependence Analysis; Automatic Parallelization; Binary Rewriting;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium on
Conference_Location
Atlanta, GA
ISSN
1072-4451
Print_ISBN
978-1-4244-9071-4
Type
conf
DOI
10.1109/MICRO.2010.27
Filename
5695565
Link To Document