• DocumentCode
    2242266
  • Title

    A Novel 16-bit CMOS Digitally Controlled Oscillator

  • Author

    Hasan, S. M Rezaul

  • Author_Institution
    Center for Res. in Analog & VLSI Microsystem Design, Massey Univ., Auckland
  • fYear
    2006
  • fDate
    4-7 Dec. 2006
  • Firstpage
    526
  • Lastpage
    529
  • Abstract
    A novel 16-bit CMOS digitally controlled oscillator (DCO) is described. This CMOS DCO design is based on a delay programmable differential latch which yields improved phase noise characteristics. Simulations of a 4-stage CMOS DCO using a 0.5 mum Agilent CMOS process parameters achieved a controllable frequency range of 750MHz - 1.6GHz with a monotone tuning range of around 1GHz. Monte Carlo simulations indicate that the time-period jitter due to random supply voltage fluctuations is under 250ps for worst-case considerations. Also, phase noise was found to be in the range of -175dBc @ a frequency of 600KHz from the carrier at 1.5GHz (for digital control word of 1512H) after numerous iterations of Monte Carlo simulations. FFT analysis indicate a THD (total harmonic distortion) of around -57dB for the DCO output signal. Experimental fabrication using the Agilent 0.5mum 3M1P CMOS process technology was used for the verification of the functional operation of the DCO. This CMOS design would thus provide considerable performance enhancement in digital PLL applications
  • Keywords
    CMOS digital integrated circuits; Monte Carlo methods; digital phase locked loops; flip-flops; oscillators; 0.5 micron; 0.750 to 1.6 GHz; 3M1P CMOS process; 600 kHz; Agilent CMOS process; FFT analysis; Monte Carlo simulations; delay programmable differential latch; digital PLL applications; digitally controlled oscillator; monotone tuning; phase noise jitter; random supply voltage fluctuations; time-period jitter; CMOS process; Delay; Digital control; Frequency; Harmonic analysis; Jitter; Oscillators; Phase noise; Tuning; Voltage fluctuations; CMOS integrated circuits; Digitally controlled oscillator; PLL; jitter; phase noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
  • Conference_Location
    Singapore
  • Print_ISBN
    1-4244-0387-1
  • Type

    conf

  • DOI
    10.1109/APCCAS.2006.342524
  • Filename
    4145447